1. Field of the Invention
The present invention relates to the field of current amplifiers and in particular, to fully switched current amplifier drivers.
2. Related Art
A local-area network ("LAN") is a communication system that enables personal computers, work stations, file servers, repeaters, data terminal equipment ("DTE"), and other such information processing equipment located within a limited geographical area such as an office, a building, or a cluster of buildings to electronically transfer information among one another. Each piece of information processing equipment in the LAN communicates with other information processing equipment in the LAN by following a fixed protocol (or standard) which defines the network operation. Information processing equipment made by different suppliers can thus be readily incorporated into the LAN.
The ISO Open Systems Interconnection Basic Reference Model defines a seven-layer model for data communication in a LAN. The lowest layer in the model is the physical layer which consists of modules that specify (a) the physical media which interconnects the network, nodes and over which data is to be electronically transmitted, (b) the manner in which the network nodes interface to the physical transmission media, (c) the process for transferring data over the physical media, and (d) the protocol of the data stream.
IEEE Standard 802.3, Carrier Sense Multiple Access with Collision Detection (CSMA/CD) Access Method and Physical Layer Specifications, is one of the most widely used standards for the physical layer. Commonly referred to as Ethernet, IEEE Standard 802.3 deals with transferring data over twisted-pair cables or coaxial cables. The 10 Base-T protocol of IEEE Standard 802.3 prescribes a rate of 10 megabits/second ("Mbps") for transferring data over twisted-pair cables.
The constant need to transfer more information faster, accompanied by increases in data processing capability, necessitated an expansion to data transfer rates considerably higher than the 10-Mbps rate prescribed by the 10 Base-T protocol. As a consequence, a protocol referred to as 100 Base-T was developed for extending IEEE Standard 802.3 to accommodate data moving at an effective transfer rate of 100 Mbps through twisted-pair cables. Under the 100 Base-T protocol, certain control bits are incorporated into the data before it is placed on a twisted-pair cable. The result is that the data and control signals actually move through a twisted-pair cable at 125 Mbps.
FIG. 1 illustrates the data transmit path 100 of communication in the LAN. During data transmission, a communication unit operating on the LAN, such as a computer 117, generates a data signal T1 which is converted into differential form for transmission on the twisted pair cable 103. For 10 Base-T transmission, this data signal T1 is Manchester coded 101 to reduce electromagnetic interference and to produce square wave pulses. These pulses are then filtered 101 such that the square wave pulses are basically sinusoidal waves. These waves then go through a waveshaping filter to generate filtered differential data signals T1+/-. For 100 Base-T transmission, the data signal T1 is scrambled 119, converted to differential format 119, and MLT-3 coded 105 to generate trinary differential signals T2+/-. A 10 Base-T amplifier signal driver 107 and a 100 Base-T amplifier signal driver 109 take these differential signals T1+/- and T2+/-, respectively, and generate current-sourced differential signals T10+/- and T20+/-, respectively, to drive a primary load 105 and to transmit them on the twisted pair cable 103.
Transformer 111 isolates the twisted-pair cable 103 from the circuitry producing the transmit signals. The transformer has a primary winding 111A and a secondary winding 111B. The primary winding 111A terminates at a primary load 105 and the secondary winding terminates at a secondary load 113. The secondary load couples to a connecting unit 115, which couples to the twisted-pair cable 103. The primary winding 111A couples to a resistive load 105. It is across this resistive load 105 that either sine wave 10 Base-T signalling or MLT-3 100 Base-T signalling must be created.
Presently, amplifiers driven in a differential fashion are used to drive either the 10 Base-T signalling or the 100 Base-T signalling. An example of such a conventional amplifier circuit 200 is shown in FIG. 2. This current amplifier circuit 200 includes a resistive load 207, which is typically 100 ohms, and two terminating resistors 209, 211, each of which are typically 50 ohms. As a result, the current amplifier circuit 200 must drive not only the resistive load 207, but the termination resistors 209, 211 as well. This requires the current amplifier circuit 200 to source a significant amount of current, which requires a significant amount of power.
The current amplifier circuit 200 also includes a current source 201, typically a current mirror current source, and two voltage controlled PMOS transistors 203 and 205. The PMOS transistors 203, 205 operate in the saturation region and switch on and off when driven by signals having voltage levels between V1 and V2, which are output from voltage sources (not shown). When the voltage levels V1, V2 are applied to the gates of transistors 203 and 205 they direct current through the load resistor 207 as indicated by arrows 209 and 211. For example, to direct current through the load resistor 207 in the direction indicated by arrow 209, a voltage signal is applied to PMOS transistor 203 to turn it on, and a voltage signal is applied to PMOS transistor 205 to turn it off.
The voltage levels of both voltage signals V1 and V2 must be accurately controlled to generate the proper current. Additionally, these voltage levels must be maintained constant on both sides of the current amplifier circuit 200, and the transistors 203 and 205 must be matched. As a result, the same voltage levels are attained at both nodes OUT+and OUT-, which levels are generated across the load resistor 207.
In addition to the large power requirement, another disadvantage of this amplifier circuit 200 is that all the transistors must be matched rather closely for the best performance to occur. At least two transistors are needed for the current source 201. These transistors (not shown), is well as the PMOS transistors 203 and 205 all must match. This is very difficult to do.
A second conventional current amplifier driver circuit is shown in FIG. 3. This amplifier driver circuit 300 uses two current sources 301, 303 to generate a voltage across a 100 ohm load resistor 305. The current sources 301, 303 are typically current mirror circuits. Similar to the amplifier driver circuit 200, the current sources 301, 303 of the amplifier driver 300 must drive the resistive load 305 as well as two 50 ohm terminating resistors 307, 309.
Typically, signal generators (not shown) provide input signals I.sub.IN+/- to current sources 301 and 303, respectively. The input signals I.sub.IN+/- are half-wave rectified, and 180 degrees out of phase from one another, i.e., I.sub.IN+ is 180 degrees out of phase from I.sub.IN-. As a result, when either of the current sources 301, 303 receive a signal, that particular current source becomes active. When that current source does not receive a signal, that current source is off. The effect of this arrangement is for current sources 301 and 303 to alternate between "active" and "inactive" states, such that only one current source is active at a given time.
When current source 301 is active, the external resistors 307, 309, which are tied high, pull current through the amplifier driver circuit 300 and the resistive load 305. This operation provides a voltage drop, proportional to the current flow, across the load resistor in the direction indicated by arrow 311. For the other half of the signal cycle, current source 303 is active and current source 301 is inactive. When current source 303 is active, current is pulled through external resistors 307 and 309 and the load 305. This operation provides a voltage drop across the load resistor 305 in the direction indicated by arrow 313. The result is a composite output waveform across the load resistor 305.
There are several disadvantages to this conventional circuit 300. First, the circuit must drive current through not only the load resistor but the terminating resistors 307 and 309 as well. This current requirement commands a significant amount of power.
Second, there are problems associated with switching sources 301 and 303 on and off. It is very difficult to match the current sources 301 and 303. To match the gain of the two current sources 301, 303 exactly, not only do the transistors (not shown) used for the current source 301 have to match, but those transistors have to match the transistors (not shown) used for current source 303 as well. Therefore, at least four transistors must be matched and this is quite difficult. When the current sources 301, 303 are mismatched different voltage levels are generated across the resistive load.
Furthermore, it is difficult to attain the same voltage levels needed to switch the transistors between voltage levels V1 and V2. This too causes different voltage levels to be generated across the resistive load.
Thus, a need exists for a circuit to drive both 10 Base-T analog signals and 100 Base-T digital signals which overcomes these power consumption, matching and switching problems and which has a high switching speed (e.g., 3-5 nanoseconds or less).